//让LED以亮0.25秒->灭0.5秒->亮0.75秒->灭1秒的规律，持续循环闪烁
module fsm2 (
    input clk,//27MHz
    input reset,
    output reg led
);
    reg[1:0] state;
    reg[1:0] next_state;
    reg[24:0] cont;
    parameter  high1=6750000-1;
    parameter  low1=13500000-1;
    parameter  high2=20250000-1;
    parameter  low2=27000000-1;

    always @(posedge clk or negedge reset) begin
        if (reset==0) begin
             if (reset==0) begin
            state<=0;
            cont<=0;
            next_state<=0;
            end  
        end else begin
            case (state)
            0:begin
                if (cont==high1) begin
                    next_state=1;
                    cont<=0;
                end else begin
                    next_state=0;
                    cont<=cont+1;
                end
            end 
            1:begin
                if (cont==low1) begin
                    next_state=2;
                    cont<=0;
                end else begin
                    next_state=1;
                    cont<=cont+1;
                end 
            end
            2:begin
                if (cont==high2) begin
                    next_state=3;
                    cont<=0;
                end else begin
                    next_state=2;
                    cont<=cont+1;
                end 
            end 
            3:begin
                if (cont==low2) begin
                    next_state=0;
                    cont<=0;                    
                end else begin
                    next_state=3;
                    cont<=cont+1;
                end 
            end                       
        endcase
        end
        
    end

    always @(posedge clk or negedge reset) begin
        case (state)
            0:led<=0;
            1:led<=1;
            2:led<=0;
            3:led<=1;
        endcase
    end

    always @(posedge clk or negedge reset) begin
      
            state<=next_state;
       
    end
endmodule
